This paper proposes a DSP-based digital closed-loop power amplifier control system to determine the optimal step size of the output power rise or fall by detecting the forward and reverse power voltage, increase or decrease the output power of the power amplifier according to the step, and detect whether the output power exceeds any time. The rated output power, if exceeding the rated output power, is adjusted according to the determined maximum descending step, and the power output of the power amplifier is reduced to the rated power in time, thus forming a closed-loop control system. Due to the use of DSP as the processing core, processing speed and calculation accuracy are guaranteed. This not only ensures the safety and reliability of the power amplifier, but also allows the power amplifier to output as much as possible the maximum power that can be transmitted.
System hardware structure
The whole system consists of C5509A, AD9857 and AD7655. The system block diagram is shown in Figure 1.
Figure 1 System block diagram
As can be seen from Figure 1, the DSP is the core control unit; the AD9857 is used to transmit data, upconvert, and output analog data to the power amplifier, and then transmitted through the antenna. The control signal of the AD9857 is realized by the SPI interface of the DSP. The AD7655 is responsible for collecting the forward and reverse voltage values â€‹â€‹of the power amplifier, and sends the voltage value back to the DSP. The DSP performs power amplifier control according to the voltage value. The SRAM stores the transmitted baseband data and the intermediate variables that calculate the transmitted baseband data in real time. Flash saves the program required by the DSP for the DSP to power on; the HPI port is used between the DSP and the PC, and the PCI bridge chip is used to realize the connection with the PC. DSP to AD9857, AD7655, SRAM and Flash are connected by DSP EMIF interface, EMIF interface is DSP's external memory interface (External Memory Interface), which can be easily connected with external Flash, asynchronous SRAM and other devices. The external device data communication rate of this system is low, the highest data transmission rate is 48Mb/s of AD9857, and the EMIF interface of C5509A is suitable for meeting its speed requirement.
Closed loop control algorithm
A typical control method for the output power of the transmitter power amplifier is to adjust the output power of the transmitter according to the standing wave ratio. The relationship between the forward and reverse power detection voltages of the transmitter and the output power of the power amplifier and the standing wave ratio is as follows.
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